xSIID - Memory layout

Thanks, maybe the pm3 output is off. I did a full scan with taginfo and it looks, how I expected it to. Just not sure why the pm3 is putting the PWD into E8.

[0DF] . 00 00 00 00 |....|
[0E0] . 00 00 00 00 |....|
[0E1] . 53 69 69 44 |SiiD|
[0E2] . 00 00 FF 00 (LOCK2-LOCK4, CHK)
[0E3] . 00 00 00 E2 (RFU-RFU, AUTH0)
[0E4] . 00 00 00 00 (ACCESS, RFU-RFU)
[0E5] . 00 00 00 00 (PWD)
[0E6] . 00 00 00 00 (PACK,PACK,RFU,RFU)
[0E7] . 00 00 00 00 (PT_I2C, RFU-RFU)
[100] . 00 00 00 00 |....|
[101] . 00 00 00 00 |....|

Configuration registers:
[0E8] w 01 00 F8 48 (NC, LD, SM, WDT0)
[0E9] w 08 01 00 -- (WDT1, CLK, LOCK)

Session registers:
[0EC] r 01 00 F8 48 (NC, LD, SM, WDT0)
[0ED] r 08 01 01 -- (WDT1, CLK, NS)
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