Oh almost certainly 
the RF engineers at NXP, with $100k+ in analysis equipment and simulation software, wouldn’t do all that extra work for no reason.
Now what the point is would be a bit more difficult to nail down. It could have to do with eliminating parasitic capacitance between the traces to allow more accurate estimation of the inductance value while designing. If you review this test board I made you’ll see that the coil design where I split half the turns on the top of the board and half on the bottom was spot on to the calculated Inductance using NXP’s formulas.
It makes sense that they would need that accuracy for the field detector board, because there’s no tuning capacitor, the LED is the the tuning cap (and a small one at that). Doing it this way could also present a lower impedance so that more power could be delivered from the reader, which would also make sense for lighting an LED.